>* A model 41 says on boot-up - SuperSPARC/SuperCache PAC Enabled.
> A model 30 will just say - SuperSPARC PAC enabled.
> (Presumably a model 20 will pattern like the model 30.)
>* cpu = SUNW,SPARCstation-10
> mod0 = TI,TMS390Z55 (mid = 8) => model 41 or 20.
> mod0 = TI,TMS390Z50 (mid = 8) => model 30.
Umm, if a model 20 says just "SuperSPARC: PAC ENABLED", rather than
"SuperSPARC/SuperCache: PAC ENABLED", I'd expect it to say "mod0 =
TI,TMS390Z50", rather than "TI,TMS390Z55", given that the TI TMS390Z55
chip is the SuperCache chip in question....
Does a Model 20 *really* assert that it has a TMS390Z55 (as well as its
TMS390Z50 SuperSPARC CPU chip)?
(For those who are curious, "PAC" stands for "Physically Addressed
Cache"; the on-chip cache on the TMS390Z50, and the off-chip cache
controlled by the TMS390Z55, is physically-indexed and
>With the cover off. Look at the processor card.
>* One black "can" => model 30 or 20.
> Two black "cans" => model 41.
In that case, a Model 20 had better identify itself as TMS390Z50, given
that there's only one chip on the Mbus module, and a TMS390Z55 is, as
far as I know, incapable of executing SPARC instructions....
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